Testability-based partial scan analysis

  title={Testability-based partial scan analysis},
  author={Prashant S. Parikh and Miron Abramovici},
  journal={J. Electronic Testing},
In this paper, we present a new method for selecting flip-flops for partial scan. Our method ranks all flip-flops in a circuit based on a sensitivity analysis which estimates the relative improvement in the testability of the circuit as a result of scanning a flip-flop. The testability is an estimate of the fault coverage expected for the circuit and is computed with respect to a given set of target faults. Several cost functions are used to compute testability, taking both structural and… CONTINUE READING