Test control for secure scan designs

@article{Hly2005TestCF,
  title={Test control for secure scan designs},
  author={David H{\'e}ly and Fr{\'e}d{\'e}ric Bancel and Marie-Lise Flottes and Bruno Rouzeyre},
  journal={European Test Symposium (ETS'05)},
  year={2005},
  pages={190-195}
}
Designing secure ICs requires fulfilling many design rules in order to protect access to secret data. However, these security design requirements may be in opposition to test needs and testability improvement techniques that increase both observability and controllability. Nevertheless, secure chip designers cannot neglect the testability of their chip; a high quality production testing is primordial to ensure a good level of security since any faulty devices could induce major security… CONTINUE READING
Highly Cited
This paper has 66 citations. REVIEW CITATIONS

Citations

Publications citing this paper.
Showing 1-10 of 48 extracted citations

66 Citations

01020'07'10'13'16
Citations per Year
Semantic Scholar estimates that this publication has 66 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.
Showing 1-6 of 6 references

Karri, Polytechnic University, "Scanbased Side-Channel Attack on Dedicated Hardware Implementations on Data Encryption Standard

  • B. Yang, R. K. Wu
  • International Test Conference (ITC
  • 2004
3 Excerpts

Poehman, “Debug Methodology for the Mckinley Processor

  • S. D. Josephson
  • International Test Conference,
  • 2001
1 Excerpt

Similar Papers

Loading similar papers…