Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs

@article{Hou2010TestAR,
  title={Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs},
  author={Chih-Sheng Hou and Jin-Fu Li and Che-Wei Chou},
  journal={2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications},
  year={2010},
  pages={3-7}
}
Built-in self-repair (BISR) is one promising approach for improving the yield of memory cores in an system-on-chip (SOC). This paper presents a test scheduling approach for BISR memory cores under the constraint of maximum power consumption. An efficient test scheduling algorithm based on the early-abort probability is proposed. Experimental results show that the scheduled results of the proposed algorithm have lower expected test time in comparison with the previous work. For ITC’02 benchmarks… CONTINUE READING

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