Tempest and Typhoon: User-Level Shared Memory

Abstract

Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines limit these programs to a single communication paradigm, either message-passing or shared-memory, which results in uneven performance. This paper addresses this problem by defining an interface, <i>Tempest</i>, that exposes low-level communication and memory-system mechanisms so programmers and compilers can customize policies for a given application. <i>Typhoon</i> is a proposed hardware platform that implements these mechanisms with a fully-programmable, user-level processor in the network interface. We demonstrate the utility of Tempest with two examples. First, the <i>Stache</i> protocol uses Tempest's finegrain access control mechanisms to manage part of a processor's local memory as a large, fully-associative cache for remote data. We simulated Typhoon on the Wisconsin Wind Tunnel and found that Stache running on Typhoon performs comparably (&amp;plusmn;30%) to an all-hardware Dir<inf>N</inf>NB cache-coherence protocol for five shared-memory programs. Second, we illustrate how programmers or compilers can use Tempest's flexibility to exploit an application's sharing patterns with a custom protocol. For the EM3D application, the custom protocol improves performance up to 35% over the all-hardware protocol.

DOI: 10.1145/191995.192062

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@inproceedings{Reinhardt1994TempestAT, title={Tempest and Typhoon: User-Level Shared Memory}, author={Steven K. Reinhardt and James R. Larus and David A. Wood}, booktitle={25 Years ISCA: Retrospectives and Reprints}, year={1994} }