Temperature-aware voltage islands architecting in system-on-chip design

@article{Hung2005TemperatureawareVI,
  title={Temperature-aware voltage islands architecting in system-on-chip design},
  author={Wei-Lun Hung and Greg M. Link and Yuan Xie and Narayanan Vijaykrishnan and Nagu R. Dhanwada and John Conner},
  journal={2005 International Conference on Computer Design},
  year={2005},
  pages={689-694}
}
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC performance, power, and reliability. In view of this, we present a hybrid optimization approach which aims at temperature reduction and hot spot elimination. We demonstrate that considerable improvement in the thermal distribution of a design can be achieved through careful voltage island partitioning, voltage level… CONTINUE READING
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