Forward Body Biased Adiabatic Logic for Peak and Average Power Reduction in 22nm CMOS
efficient temperature aware design in modern microprocessors, especially in the design of digital portable, notebook, and handheld computers is becoming increasingly important. Many studies have been done on microprocessor’s dynamic thermal management techniques and methodologies; from thermal estimation to voltage scaling, clock gating, and total/active power monitoring and control. As technology, moves into deep submicron feature sizes and the leakage power are expected to increase because of the exponential increase in leakage currents with technology scaling. In nanometer technologies, it is observed that leakage power will become comparable to dynamic or total power dissipation in the next generation processors in the next few years. This paper presents a hardware design for dynamic thermal management strategies for microprocessors leakage power control, which is particularly appealing for portable and embedded systems. LTspice simulation program is used to verify the theoretical idea and confirm the design operations. Results shows that, the appropriate thermal management system can be designed for a much lower maximum power rating with minimal performance impact for typical applications, considerable amount of power consumption reduction as well as thermal aware challenges have been obtained. Keywords— Thermal Management, Leakage Power, Reverse Body Biasing.