Technology Mapping for Large Complex PLDs

  title={Technology Mapping for Large Complex PLDs},
  author={Jason Helge Anderson and Stephen Dean Brown},
In this paper we present a new technology mapping algorithm for use with complex PLDs (CPLDs), which consists of a large number of PLA-style logic blocks. Although the traditional synthesis approach for such devices uses two-level minimization, the complexity of recently-produced CPLDs has resulted in a trend toward multi-level synthesis. We describe an approach that allows existing multi-level synthesis techniques [13] to be adapted to produce circuits that are well-suited for implementation… CONTINUE READING
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