Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits

@inproceedings{Folco2005TechnologyMF,
  title={Technology Mapping for Area Optimized Quasi Delay Insensitive Circuits},
  author={Bertrand Folco and Vivian Br{\'e}gier and Laurent Fesquet and Marc Renaudin},
  booktitle={VLSI-SoC},
  year={2005}
}
Quasi delay insensitive circuits are functionally independent of delays in gates and wires (except fo r some particular wires). Such asynchronous circuits offer high robustness but do not perform well to automati cally synthesize and optimize. This paper presents a new methodology to model and synthesize data path QDI circuits. The model used to represent circuits is b a ed on Multi-valued Decision Diagrams and allows obtaining QDI circuits with two-input gates. Optimization is achieved by… CONTINUE READING
Highly Cited
This paper has 32 citations. REVIEW CITATIONS
23 Citations
17 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-10 of 23 extracted citations

Similar Papers

Loading similar papers…