TOV: Sequential Test Generation by Ordering of Test Vectors

@article{Pomeranz2010TOVST,
  title={TOV: Sequential Test Generation by Ordering of Test Vectors},
  author={Irith Pomeranz and Sudhakar M. Reddy},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2010},
  volume={29},
  pages={454-465}
}
We describe a new approach to test generation for stuck-at faults in synchronous sequential circuits. Under this approach, the input vectors comprising the test sequence are fixed in advance. The process of generating the test sequence consists of ordering the precomputed input vectors such that the resulting test sequence has as high a fault coverage as possible. The advantage of this approach is that its computational complexity is limited by limiting the search space to a given set of input… CONTINUE READING

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