TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis

@article{Czutro2009TIGUANTI,
  title={TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis},
  author={Alexander Czutro and Ilia Polian and Matthew D. T. Lewis and Piet Engelke and Sudhakar M. Reddy and Bernd Becker},
  journal={2009 22nd International Conference on VLSI Design},
  year={2009},
  pages={227-232}
}
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully chosen mix of various optimization techniques, multi-million-gate industrial circuits are handled without aborts. TIGUAN supports both conventional single-stuck-at faults and sophisticated conditional multiple stuck-at faults which allows to generate patterns for non-standard fault models. 

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