TD-SCDMA/HSDPA Transceiver and Analog Baseband Chipset in 0.18- $\mu\hbox{m}$ CMOS Process

@article{Li2010TDSCDMAHSDPATA,
  title={TD-SCDMA/HSDPA Transceiver and Analog Baseband Chipset in 0.18- \$\mu\hbox\{m\}\$ CMOS Process},
  author={Zhenbiao Li and Ming Li and Dong Zhao and Dequn Ma and Wenhai Ni and Zhongming Ouyang},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2010},
  volume={57},
  pages={90-94}
}
A dual-band time-division synchronous code-division multiple access chipset supporting 2.8-Mb/s high-speed downlink packet access has been demonstrated in 0.18-μm CMOS technology. The receiver adjacent channel selectivity requirement for the transceiver is relaxed by utilizing a high-dynamic-range analog-to-digital converter that allows selectivity… CONTINUE READING