System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design

@article{Hu2006SystemLevelBA,
  title={System-Level Buffer Allocation for Application-Specific Networks-on-Chip Router Design},
  author={Jingcao Hu and {\"U}mit Y. Ogras and R. Marculescu},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2006},
  volume={25},
  pages={2919-2933}
}
  • Jingcao Hu, Ümit Y. Ogras, R. Marculescu
  • Published 2006
  • Engineering, Computer Science
  • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • In this paper, a novel system-level buffer planning algorithm that can be used to customize the router design in networks-on-chip (NoCs) is presented. More precisely, given the traffic characteristics of the target application and the total budget of the available buffering space, the proposed algorithm automatically assigns the buffer depth for each input channel, in different routers across the chip, such that the overall performance is maximized. This is in deep contrast with the uniform… CONTINUE READING
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