Synthesizable reconfigurable array targeting distributed arithmetic for system-on-chip applications

@article{Khawam2004SynthesizableRA,
  title={Synthesizable reconfigurable array targeting distributed arithmetic for system-on-chip applications},
  author={Sami Khawam and Tughrul Arslan and Fred Westall},
  journal={18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.},
  year={2004},
  pages={150-}
}
Summary form only given. Domain-specific reconfigurable arrays are embedded arrays optimized for one domain of applications providing performance improvements over generic embedded field programmable gate arrays (FPGAs). An embedded reconfigurable array that targets distributed arithmetic (DA) implementations is presented. DA includes calculations that are commonly found in multimedia applications, such as filtering and discrete cosine transform (DCT). Two benchmark DCT circuits are implemented… CONTINUE READING

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Key Quantitative Results

  • It was demonstrated that the array provides approximately a 40% reduction in power consumption, a decrease of 12% in area and an improvement of about 35% in timing.

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