Synthesis of opamps by manipulation of BBBs described under the standard of Verilog-AMS

@article{MunozPacheco2005SynthesisOO,
  title={Synthesis of opamps by manipulation of BBBs described under the standard of Verilog-AMS},
  author={J.-M. Munoz-Pacheco and Esteban Tlelo-Cuautle},
  journal={48th Midwest Symposium on Circuits and Systems, 2005.},
  year={2005},
  pages={591-594 Vol. 1}
}
It is presented a structured method for the synthesis of CMOS opamps, which explores all possibilities to interconnect basic building blocks (BBBs), described under the standard of Verilog-AMS. The synthesis procedure manipulates internal nodes, port nodes and global (external) nodes during the superimposing of BBBs, and updates all nodes to encapsulate all BBBs into one general macro-block, the opamp. The structure of the method consist of a library of BBBs described in Verilog-AMS, and the… CONTINUE READING

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