Synthesis of interface controllers from timing diagram specifications

@article{ElAboudi1998SynthesisOI,
  title={Synthesis of interface controllers from timing diagram specifications},
  author={A. El-Aboudi and E...................................... Aboulhamid and Eduard Cerny},
  journal={Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143)},
  year={1998},
  pages={89-92}
}
We present a method for verifying the realizability of a timing diagram, ensuring the synthesis of the underlying interface is possible. If necessary, a heuristic is introduced to render explicit hidden timing constraints implied by the specification. A relative schedule of output events is computed, accepting input events from the complete timing space defined by the assumed constraints on the environment. 

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