Synthesis of Cyclic Encoder and Decoder for High Speed Networks

@inproceedings{Rizzi2005SynthesisOC,
  title={Synthesis of Cyclic Encoder and Decoder for High Speed Networks},
  author={Maria Rizzi and M. Maurantonio},
  year={2005}
}
In this paper a parallel implementation of an encoder and of a decoder for cyclic codes to increase the bit rate is proposed. The structures are composed of a cascade of iterative combinational cells able to obtain a finite output sequence spatially. The proposed solution allows high bit rates and high degree of modularity, so an easy integration of the… CONTINUE READING