Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays


A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 μm opto-CMOS process fed at 3.3 V and due to the highly effective integrated pin photodiode it operates at μW. A regenerative latch acting as a sense amplifier leads in addition to a low electrical power… (More)
DOI: 10.3390/s16060761

5 Figures and Tables


  • Presentations referencing similar topics