Symbolic Functional Evaluation

@inproceedings{Day1999SymbolicFE,
  title={Symbolic Functional Evaluation},
  author={Nancy A. Day and Jeffrey J. Joyce},
  booktitle={TPHOLs},
  year={1999}
}
Symbolic functional evaluation (SFE) is the extension of an algorithm for executing functional programs to evaluate expressions in higher-order logic. SFE carries out the logical transformations of expanding definitions, beta-reduction, and simplification of built-in constants in the presence of quantifiers and uninterpreted constants. We illustrate the use of symbolic functional evaluation as a "universal translator" for linking notations embedded in higher-order logic directly with automated… 

Lightweight analysis of operational specifications using inference graphs

  • L. DillonR. Stirewalt
  • Computer Science
    Proceedings of the 23rd International Conference on Software Engineering. ICSE 2001
  • 2001
The paper provides a detailed but informal introduction to inference graphs, which enables Amalia to automatically tailor high-level analyses, such as behavior simulation and model checking, to different specification languages and representations.

A Semantics-Based Approach for Mapping Specification Notations to Analysis Tools

Approaches to generate analyzers automatically from a description of a notation’s semantics are proposed, which take a specification in that notation as an input, and it automatically generates a transition-relation for the specification.

Inference Graphs: A Computational Structure Supporting Generation of Customizable and Correct Analysis Components

This paper describes how to balance the need for assurance, which typically implies a formal proof obligation, against other design concerns, whose solutions leverage design techniques that are not (yet) accompanied by mature proof methods.

Metro: An Analysis Toolkit for Template Semantics

We describe the Metro toolkit, which supports software modelling and analysis for requirements notations that have congurable semantics. Metro is based on a formalism, called template semantics,

Template semantics: a parameterized approach to semantics-based model compilation

This dissertation discusses a parameterized approach to the compiling of model-based notations into input languages of formal-analysis tools, based on descriptions of the notations' semantics, using the template semantics of seven composition operators and some of their variants.

Model Checking Template-Semantics Specifications

A translator that takes as input a specification, and a set of template parameters, encoding the specification’s semantics, and produces a model suitable for the NuSMV model checker, which is a parameterized technique for model checking specifications written in a variety of notations.

A framework for multi-notation requirements specification and analysis

  • N. DayJ. Joyce
  • Computer Science
    Proceedings Fourth International Conference on Requirements Engineering. ICRE 2000. (Cat. No.98TB100219)
  • 2000
A framework for integrating notations from four distinct categories, namely "models", "events", "actions, and "expressions", which allows for new combinations of notations without changing existing notations or rebuilding formal analysis tools such as model checkers.

Formal interpreters for diagram notations

An approach for defining extensible and flexible formal interpreters for diagram notations with significant dynamic semantics, that is, sets of notations that share core concepts, but present slightly different interpretations.

Symbolic Simulation of Microprocessor Models using Type Classes in Haskell

This work uses polymorphism and the type class system, a unique feature of Haskell, to write models that work over both concrete and symbolic data, and offers this approach as an alternative to using uninterpreted constants.

Composable semantics for model-based notations

This framework captures the execution semantics that are common among model-based notations, and leaves the distinct elements to be defined by a set of parameters, and believes that a description of a notation's semantics in this framework can be used as input to a tool that automatically generates formal analysis tools.

References

SHOWING 1-10 OF 41 REFERENCES

Executing HOL Specifications: Towards an Evaluation Semantics for Classical Higher Order Logic

Executing Formal Specifications by Translation to Higher Order Logic Programming

The translation improves on previous work in the field of executing specifications by allowing formulas with quantifiers to be executed, and by permitting users to pose Prolog-style queries with free variables to be instantiated by the system.

Efficient compilation of lazy evaluation

The principles underlying an efficient implementation of a lazy functional language, compiling to code for ordinary computers, based on combinator-like graph reduction: the user defined functions are used as rewrite rules in the graph.

Hol-ml

This paper explains how the evaluation rules were defined and how it was proved that evaluation is deterministic and gives a short description of the mutually recursive type definition package that was wrote to enable us to define the types the authors needed to create the HOL-ML grammar.

Checking properties of safety critical specifications using efficient decision procedures

The Stanford Validity Checker (SVC), a highly efficient, general-purpose decision procedure for quantifier-free first-order logic with linear arithmetic, is adapted to check the consistency of specifications written in Requirements State Machine Language (RSML).

A framework for multi-notation, model-oriented requirements analysis

This dissertation addresses the problem of how to bring the bene ts of formal analysis to the changing world of multi-notation requirements speci cations. We show that direct use of the formal

The formal verification of generic interpreters

This dissertation contains results that provide a methodological approach to microprocessor verification, and presents a hierarchical decomposition strategy for specifying microprocessors and a theory of interpreters that can be used to model microprocessor behavior.

Efficient validity checking for processor verification

We describe an efficient validity checker for the quantifier-free logic of equality with uninterpreted functions. This logic is well suited for verifying microprocessor control circuitry since it

Mechanizing programming logics in higher order logic

Formal reasoning about computer programs can be based directly on the semantics of the programming language, or done in a special purpose logic like Hoare logic, where the proofs can be more direct and natural.

Toward a Super Duper Hardware Tactic

This paper presents techniques for automating many of the tedious aspects of hardware verification in a higher order logic theorem proving environment, and envision a system that captures most of this reasoning in one tactic, SuperDuperHWTac.