Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs

@article{Fletcher2014SuppressingTO,
  title={Suppressing the Oblivious RAM timing channel while making information leakage and program efficiency trade-offs},
  author={Christopher W. Fletcher and Ling Ren and Xiangyao Yu and Marten van Dijk and Omer Khan and Srinivas Devadas},
  journal={2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)},
  year={2014},
  pages={213-224}
}
Oblivious RAM (ORAM) is an established cryptographic technique to hide a program's address pattern to an untrusted storage system. More recently, ORAM schemes have been proposed to replace conventional memory controllers in secure processor settings to protect against information leakage in external memory and the processor I/O bus. A serious problem in current secure processor ORAM proposals is that they don't obfuscate when ORAM accesses are made, or do so in a very conservative manner. Since… CONTINUE READING
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