Corpus ID: 19853501

Supporting high-performance pipelined computation in commodity-style fpgas

@inproceedings{Hauck2008SupportingHP,
  title={Supporting high-performance pipelined computation in commodity-style fpgas},
  author={S. Hauck and Kenneth Eguro},
  year={2008}
}
Although the popularity of Field Programmable Gate Arrays, or FPGAs, is a testament to their unique mixture of flexibility and ease of use, this adaptability can come at price. The programmable nature of FPGAs introduces significant inefficiencies that can limit the maximum clock frequency of mapped circuits. While there are multiple techniques developers apply to mitigate this performance penalty, these enhancements can generate an enormous number of additional registers. These heavily… Expand
2 Citations
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