Study of high speed interconnects of multiple dies stack structure with Through-Silicon-Via (TSV)

Abstract

Die stacking is widely adopted for high chip count systems to reduce the requirement of substrate area. The incorporation of Through-Silicon-Via (TSV) as vertical interconnects further reduces the interconnect path length from the top die to substrate. As the fabrication resolution keeps on shrinking, devices of even higher chip count are required to be… (More)

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