StrongARM: a high-performance ARM processor

@article{Witek1996StrongARMAH,
  title={StrongARM: a high-performance ARM processor},
  author={Richard T. Witek and James Montanaro},
  journal={COMPCON '96. Technologies for the Information Superhighway Digest of Papers},
  year={1996},
  pages={188-191}
}
A 32-bit 162 MHz/215 MHz custom VLSI ARM microprocessor is described. The chip contains two 16 Kbyte, 32-way set associative caches for instructions and data. The 2.1 M transistor chip is fabricated in a 2.0 V, 0.35 /spl mu/m, 3-layer metal CMOS process. It dissipates 0.5 W at 162 MHz/1.5 V and 1.1 W at 215 MHz/2.0 V. 

Figures and Topics from this paper.

Citations

Publications citing this paper.
SHOWING 1-10 OF 15 CITATIONS

Value Reuse Potential in ARM Architectures

  • 2016 28th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
  • 2016
VIEW 1 EXCERPT
CITES METHODS

3WD omni-wheeled mobile robot using ARM processor for line following application

  • 2011 IEEE Symposium on Industrial Electronics and Applications
  • 2011
VIEW 1 EXCERPT
CITES BACKGROUND

Challenges of Secure Routing in WSNs : a Survey

Ansgar Kellner, Kerstin Behrends, Dieter Hogrefe
  • 2010
VIEW 1 EXCERPT
CITES BACKGROUND

AsAP: An Asynchronous Array of Simple Processors

  • IEEE Journal of Solid-State Circuits
  • 2008
VIEW 2 EXCERPTS
CITES BACKGROUND & RESULTS

Two New Techniques Integrated for Energy-Efficient TLB Design

  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 2007
VIEW 3 EXCERPTS

References

Publications referenced by this paper.

A 200 MHz 64 b dual-issue CMOS microprocessor

  • 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers
  • 1992