Statistical Exploration of the Dual Supply Voltage Space of a 65nm PD/SOI CMOS SRAM Cell


This paper describes the application of a novel variability-driven statistical analysis methodology to study the stability/performance of SRAM designs in 65nm PD/SOI technology. Our objective is to explore the design-yield space for wordline and bitline voltage assignments in dual supply SRAM while taking into consideration the impact of random process… (More)


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