Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design

@article{Singhee2009StatisticalBV,
  title={Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design},
  author={Amith Singhee and Rob A. Rutenbar},
  journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  year={2009},
  volume={28},
  pages={1176-1189}
}
Circuit reliability under random parametric variation is an area of growing concern. For highly replicated circuits, e.g., static random access memories (SRAMs), a rare statistical event for one circuit may induce a not-so-rare system failure. Existing techniques perform poorly when tasked to generate both efficient sampling and sound statistics for these rare events. Statistical blockade is a novel Monte Carlo technique that allows us to efficiently filter-to block-unwanted samples that are… CONTINUE READING
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