Static thread mapping for NoCs via binary instrumentation traces

Abstract

A novel methodology is proposed for thread mapping on a chip-multiprocessor (CMP) system with a network-on-chip (NoC). This novel mapping leverages multi-threaded traces produced by a binary instrumentation tool, which classifies the communication and computation events for each thread of a multi-threaded program application. Processing these binary… (More)
DOI: 10.1109/ICCD.2014.6974731

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