Static implementation of quasi-delay-insensitive Pre-Charge Half-Buffers

Abstract

In the literature, quasi-delay-insensitive (QDI) asynchronous circuits utilizing Pre-Charge Half Buffers (PCHB) are based on either dynamic or semi-static implementations. In this paper, a static implementation of PCHB is presented, and compared to previous PCHB architectures and static NULL Convention Logic (NCL), using a full adder design. Transistor… (More)

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