Static and transient latchup simulation of VLSI-CMOS with an improved physical design model

  title={Static and transient latchup simulation of VLSI-CMOS with an improved physical design model},
  author={M. Strzempa-Depre and Jim Harter and Ch. Werner and H. Skapa and R. Kassing},
  journal={IEEE Transactions on Electron Devices},
We are presenting an improved latchup design model for static and transient latchup simulation of VLSI CMOS devices. The model is based on a decomposition of the CMOS structure into a network of analytically described current elements for both majority and minority carriers. Average doping densities and geometrical parameters are the physically based input data. For the modeling of the 2-D majority-carrier flow, transmission-line elements are introduced, especially in the inhomogeneously doped… CONTINUE READING
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