Static and Clocked Spintronic Circuit Design and Simulation With Performance Analysis Relative to CMOS

@article{Calayir2014StaticAC,
  title={Static and Clocked Spintronic Circuit Design and Simulation With Performance Analysis Relative to CMOS},
  author={Vehbi Calayir and Dmitri E. Nikonov and Sasikanth Manipatruni and Ian A. Young},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2014},
  volume={61},
  pages={393-406}
}
Spin-based devices, in which information is carried via electron spin rather than electron charge, are potential candidates to complement CMOS technology due to the promise of non-volatility and compact implementation of logic gates. One class of such devices is all-spin logic (ASL) which is based on switching ferromagnets by spin transfer torque and conduction of spin-polarized current. Using previously developed physics-based circuit models for ASL, we develop a complete logic family for… CONTINUE READING