Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems

@article{Ausavarungnirun2012StagedMS,
  title={Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems},
  author={Rachata Ausavarungnirun and Kevin Kai-Wei Chang and Lavanya Subramanian and Gabriel H. Loh and Onur Mutlu},
  journal={2012 39th Annual International Symposium on Computer Architecture (ISCA)},
  year={2012},
  pages={416-427}
}
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from the CPU cores, leading to low system performance and starvation of CPU cores. Unfortunately, state-of-the-art application-aware memory scheduling algorithms are ineffective at solving this problem at low complexity due to the large amount of GPU traffic. A large and costly request buffer is needed to provide these… CONTINUE READING
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