Specification and Verification of Distributed Embedded Systems: A Traffic Intersection Product Family

@inproceedings{lveczky2010SpecificationAV,
  title={Specification and Verification of Distributed Embedded Systems: A Traffic Intersection Product Family},
  author={Peter Csaba {\"O}lveczky and Jos{\'e} Meseguer},
  booktitle={RTRTS},
  year={2010}
}
Distributed embedded systems (DESs) are no longer the exception; they are the rule in many application areas such as avionics, the automotive industry, traffic systems, sensor networks, and medical devices. Formal DES specification and verification is challenging due to state space explosion and the need to support real-time features. This paper reports on an extensive industry-based case study involving a DES product family for a pedestrian and car 4-way traffic intersection in which… 

Reasoning about Traffic Signals Controller for Intersection with Contraflow Lanes for Bus Rapid Transit Using Linear-time Temporal Logic

This paper designs a generic traffic signal controller for four-armed junction with specialized contraflow lanes for BRT using LTL formulas that describe a general traffic scenario and informal traffic specifications to check the compliance.

Formal Specification and Model Checking of the Lim-Jeong-Park-Lee Autonomous Vehicle Intersection Control Protocol

A function used in the protocol should be revised while formally specifying it and a logical clock such that times are total order should be used to avoid deadlock states during model checking experiments.

Model Checking Classes of Metric LTL Properties of Object-Oriented Real-Time Maude Specifications

This paper presents a transformational approach for model checking two important classes of metric temporal logic (MTL) properties, namely, bounded response and minimum separation, for

An Adaptive Design Methodology for Reduction of Product Development Risk

This paper introduces a novel adaptive design methodology, which incorporates step-wise prototyping and verification, which reduces the product development risk for a small increase in the total design cycle time.

Twenty years of rewriting logic

  • J. Meseguer
  • Computer Science
    J. Log. Algebraic Methods Program.
  • 2010

Rewriting logic bibliography by topic: 1990-2011

References

SHOWING 1-10 OF 10 REFERENCES

Implementing logical synchrony in integrated modular avionics

A simple design pattern is presented that allows developers to design and verify a distributed, redundant system as though all nodes execute synchronously, and can then be distributed over a physically asynchronous architecture in such a way that the logical correctness of the design is preserved.

A Formal Architecture Pattern for Real-Time Distributed Systems

An architecture pattern for ensuring synchronous computation semantics using the PALS protocol is presented and a modeling framework in AADL is developed to automatically transform a synchronous design of a real-time distributed system into an asynchronous design satisfying the P ALS protocol.

PALS: Physically Asynchronous Logically Synchronous Systems

The PALS protocol is optimal in the sense that the bound on the periods of the real time global computation, such as the supervisory controller, is the shortest possible, and the message overhead in achieving logical synchrony is minimal.

Model Checking Classes of Metric LTL Properties of Object-Oriented Real-Time Maude Specifications

This paper presents a transformational approach for model checking two important classes of metric temporal logic (MTL) properties, namely, bounded response and minimum separation, for

Semantics and pragmatics of Real-Time Maude

This paper describes both the semantics of Real-Time Maude specifications, and of the formal analyses supported by the tool, and explains the tool's pragmatics, both in the use of its features, and in its application to concrete examples.

On Statistical Model Checking of Stochastic Systems

A statistical model checking algorithm that also verifies CSL formulas with unbounded untils, based on Monte Carlo simulation of the model and hypothesis testing of the samples, as opposed to sequential hypothesis testing is presented.

NAOMI - An Experimental Platform for Multi-modeling

NAOMI is presented, an experimental platform for enabling multiple models, developed in different DSMLs, to work together and serves as a useful testbed for exploring how diverse modeling paradigms can be combined.

All About Maude - A High-Performance Logical Framework, How to Specify, Program and Verify Systems in Rewriting Logic

This chapter discusses core Maude, a Hierarchy of Data Types: From Trees to Sets to Sets, and Object-Based Programming, which specifies Parameterized Data Structures in Maude.