Special issue on BIT CMOS built-in test architecture for high-speed jitter measurement

@article{Taylor2005SpecialIO,
  title={Special issue on BIT CMOS built-in test architecture for high-speed jitter measurement},
  author={Karen Taylor and Bryan Nelson and Alan Chong and Henry C. Lin and Eddie Chan and Mani Soma and Hosam Haggag and Jeffrey M. Huard and Jim Braatz},
  journal={IEEE Transactions on Instrumentation and Measurement},
  year={2005},
  volume={54},
  pages={975-987}
}
Timing measurements for gigahertz clock frequencies require high accuracy and resolution. This paper proposes a scalable built-in self-test (BIST) method that measures accumulated period jitter over a programmable number of periods, without using another reference clock. This on-chip method uses a charge pump to convert time to a voltage, which is digitized by an all-digital flash analog-to-digital converter (ADC). The ADC employs multiple chains of inverter strings composed of three series… CONTINUE READING
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