Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers

  title={Source Code Classification for Energy Efficiency in Parallel Ultra Low-Power Microcontrollers},
  author={Emanuele Parisi and Francesco Barchi and Andrea Bartolini and Giuseppe Tagliavini and Andrea Acquaviva},
  journal={2021 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)},
The analysis of source code through machine learning techniques is an increasingly explored research topic aiming at increasing smartness in the software toolchain to exploit modern architectures in the best possible way. In the case of low-power, parallel embedded architectures, this means finding the configuration, for instance in terms of the number of cores, leading to minimum energy consumption. Depending on the kernel to be executed, the energy optimal scaling configuration is not trivial… 

Figures and Tables from this paper

Deep Learning Approaches to Source Code Analysis for Optimization of Heterogeneous Systems: Recent Results, Challenges and Opportunities

Recent developments in deep learning for source code analysis are discussed, and techniques for kernel mapping on heterogeneous platforms are focused on, highlighting recent results, challenges and opportunities for their applications to cyber-physical systems.



Static analysis of energy consumption for LLVM IR programs

This work has developed techniques for performing a static analysis on the intermediate compiler representations of a program, targeting LLVM IR, a representation used by modern compilers, including Clang.

Automatic optimization of thread-coarsening for graphics processors

This work targets a compiler transformation specific for data-parallel languages: thread-coarsening and proposes a solution based on a machine-learning model that predicts the best coarsening factor using kernel-function static features, which automatically specializes to the different architectures considered.

Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices

This paper describes the design of an open-source RISC-V processor core specifically designed for NT operation in tightly coupled multicore clusters, and introduces instruction extensions and microarchitectural optimizations to increase the computational density and to minimize the pressure toward the shared-memory hierarchy.

Energy Prediction of OpenMP Applications Using Random Forest Modeling Approach

The proposed RFM approach predicted the energy consumption of code variants with less than 0.699 Mean Square Error and 0.998 R2 value when the testing dataset had energy variations between 0.024 joule and 150.23 joules.

Portable mapping of data parallel programs to OpenCL for heterogeneous systems

A compiler based approach to automatically generate optimized OpenCL code from data-parallel OpenMP programs for GPUs brings together the benefits of a clear high level-language (OpenMP) and an emerging standard (OpenCL) for heterogeneous multi-cores.

Integrating profile-driven parallelism detection and machine-learning-based mapping

Using profile-driven parallelism detection, this work overcome the limitations of static analysis, enabling the identification of more application parallelism, and only rely on the user for final approval, resulting in significant performance improvements of the generated parallel code.

Power analysis of embedded software: a first step towards software power minimization

A power analysis technique is developed that has been applied to two commercial microprocessors—Intel 486DX2 and Fujitsu SPARClite 934 and can be employed to evaluate the power cost of embedded software and also be used to search the design space in software power optimization.

Energy Modeling of Software for a Hardware Multithreaded Embedded Microprocessor

It is shown that by combining execution statistics with sufficient data on the processor’s thread activity and instruction execution costs, a multithreaded software energy model used with Instruction Set Simulation can yield an average error margin of less than 7%.

Code Mapping in Heterogeneous Platforms Using Deep Learning and LLVM-IR

A machine learning method designed for supporting mapping decisions through the analysis of the program source code represented in LLVM assembly language (IR) for exploiting the advantages offered by this generalised and optimised representation is presented.