Sorting-based VLSI architectures for the M-algorithm and T-algorithm trellis decoders

@article{Bengough1995SortingbasedVA,
  title={Sorting-based VLSI architectures for the M-algorithm and T-algorithm trellis decoders},
  author={Peter A. Bengough and Stanley J. Simmons},
  journal={IEEE Trans. Communications},
  year={1995},
  volume={43},
  pages={514-522}
}
The well-known M-algorithm and the newer T-algorithm are two closely related reduced-complexity trellis-search algorithms that can be used for data sequence estimation in digital communication systems. VLSI implementations of these algorithms are attractive due to the parallelism and simplicity of their operation. While a small number of VLSI structures have been proposed previously, this paper describes new sorting-based architectures that can be used to realize these algorithms. Specifically… CONTINUE READING

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