Solid Logic Technology: Versatile, high-performance microelectronics

@article{Davis1964SolidLT,
  title={Solid Logic Technology: Versatile, high-performance microelectronics},
  author={Edward M. Davis and William E. Harding and Robert S. Schwartz and John J. Corning},
  journal={IBM J. Res. Dev.},
  year={1964},
  volume={8},
  pages={102-114}
}
A new microelectronics packaging technique, called Solid logic Technology (SLT), utilizes silicon planar glass-encapsulated transistors and diodes, and graphic arts techniques for producing high-quality, passive components having tight tolerances. The result is a process permitting the low-cost realization of a variety of versatile, high-performance circuit modules. The salient features of SLT are described: the unique form of the semiconductor devices, the module fabrication process, and… 
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117 Citations
Background Citations
6
Methods Citations
3

117 Citations

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Citation Type

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The technical challenges and recent progress made in the development of silicon carrier technology for potential new applications are described.
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References

SHOWING 1-6 OF 6 REFERENCES
Hermetically sealed silicon chip diodes and transistors
Modern computer design has created a demand for large quantities of high speed logic diodes and transistors. To be technically and economically feasible extreme reliability must be combined with high…
Effects of gamma radiation on reversed-biased silicon junctions
Received December
  • Received December
  • 1963
Surface Protection of Silicon Devices with Glass Films
  • presented at the Electrochemical Society Semiconductor Symposium
  • 1961
Effects of Gamma Radiation on Reverse - Biased Silicon Junctions ” , ( Letter )
    Surface Protection of Silicon Devices with Glass Films