Soft errors issues in low-power caches

  title={Soft errors issues in low-power caches},
  author={Vijay Degalahal and Lin Li and Narayanan Vijaykrishnan and Mahmut T. Kandemir and Mary Jane Irwin},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
As technology scales, reducing leakage power and improving reliability of data stored in memory cells is both important and challenging. While lower threshold voltages increase leakage, lower supply voltages and smaller nodal capacitances reduce energy consumption but increase soft errors rates. In this work, we present a comprehensive study of soft error rates on low-power cache design. First, we study the effect of circuit level techniques, used to reduce the leakage energy consumption, on… CONTINUE READING
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