Soft Error Mitigation Using Prioritized Essential Bits

  title={Soft Error Mitigation Using Prioritized Essential Bits},
  • Published 2012
other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Summary A soft error in configuration memory can corrupt a design. However, the proper operation of a typical design loaded into a Xilinx FPGA only involves a fraction of the total number of configuration memory cells. This application note describes a method for defining the hierarchical regions of interest in a user design… CONTINUE READING
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