Slipstream Memory Hierarchies

  title={Slipstream Memory Hierarchies},
  author={Zach Purser and Karthik Sundaramoorthy and Eric Rotenberg},
A slipstream processor harnesses an otherwise unused processing element in a chip multipro-cessor (CMP) to speed up a single program. It does this by running two redundant copies of the program. Predicted-non-essential computation is speculatively removed from one of the programs , speeding it up. The second program checks the forward progress of the first and is also sped up in the process. Both program copies finish sooner than either can alone. The redundant programs are architecturally… CONTINUE READING
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