Single transistor learning synapse with long term storage
@article{Hasler1995SingleTL, title={Single transistor learning synapse with long term storage}, author={Paul E. Hasler and Chris Diorio and Bradley A. Minch and Carver Mead}, journal={Proceedings of ISCAS'95 - International Symposium on Circuits and Systems}, year={1995}, volume={3}, pages={1660-1663 vol.3} }
We describe the design, fabrication, characterization, and modeling of an array of single transistor synapses. The single transistor synapses simultaneously perform long term weight storage, compute the product of the input and floating gate value, and update the weight value according to a hebbian or a backpropagation learning rule. The charge on the floating gate is decreased by hot electron injection with high selectivity for a particular synapse. The charge on the floating gate is increased…
61 Citations
A single-transistor silicon synapse
- Physics
- 1996
A new floating-gate silicon MOS transistor for analog learning applications is developed, and a memory-update rule is derived from the physics of the tunneling and injection processes to permit the development of dense, low-power silicon learning systems.
A floating-gate MOS learning array with locally computed weight updates
- Computer Science
- 1997
On-chip learning in an array of floating-gate MOS synapse transistors demonstrates fast computation and slow adaptation: the inner product computes in 10 /spl mu/s, whereas the weight normalization takes minutes to hours.
A Complementary Pair of Four-Terminal Silicon Synapses
- Biology
- 1997
A complementary pair of pFETand nFET floating-gate silicon MOS transistors foralog learning applications, and it is shown that the synapse learningfollows a simple power law.
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- Computer Science2009 International Joint Conference on Neural Networks
- 2009
A Spiking Neural Network (SNN) architecture that incorporates Integrate-and-fire type neurons and floating-gate transistors (FGTs) to store the synaptic weights to achieve robust off-chip communication is presented.
Floating-gate MOS synapse transistors
- Engineering, Computer Science
- 1998
This work proposes a simple circuit element combining nonvolatile analog memory storage with locally computed memory updates that can be integrated into silicon learning systems.
An analog floating-gate node for Supervised learning
- Computer Science, BiologyIEEE Transactions on Circuits and Systems I: Regular Papers
- 2005
An improved analog floating-gate pFET synapse is presented that implements a supervised learning algorithm similar to the least mean square (LMS) learning rule that will enable larger-scale, on-chip learning networks than previously possible.
Synaptic plasticity in VLSI : a floating-gate approach
- Biology
- 2017
One of the major areas of research by neurobiologists is long term synaptic modification or plasticity of synapses, where synapses play a fundamental role in learning through activity dependent modification of their efficacies.
Correlation learning rule in floating-gate pFET synapses
- EngineeringISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)
- 1999
The weight dynamics of the floating-gate pFET synapse are studied and a weight update rule is derived such that the equilibrium weight value is proportional to the correlation between the gate and drain voltages.
Correlation learning rule in floating-gate pFET synapses
- Engineering
- 2001
We study the weight dynamics of the floating-gate pFET synapse and the effects of the pFET's gate and drain voltages on these dynamics. We show that we can derive a weight update rule such that the…
A Learning-Enabled Neuron Array IC Based Upon Transistor Channel Models of Biological Phenomena
- Computer Science, BiologyIEEE Transactions on Biomedical Circuits and Systems
- 2013
A single-chip array of 100 biologically-based electronic neuron models interconnected to each other and the outside environment through 30,000 synapses is presented, using Address-Event Representation (AER) spike communication for inputs and outputs to this IC.
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