Single-Word Multiple-Bit Upsets in Static Random Access Devices

@inproceedings{mspscnsDSingleWordMU,
  title={Single-Word Multiple-Bit Upsets in Static Random Access Devices},
  author={OTTAinr mspscnsD}
}
  • OTTAinr mspscnsD
Space-borne electronics systems incorporating high-density static random access memory (SRAM) are vulnerable to single-word multiple-bit upsets (SMUs). We review here recent observations of SMU, present the results of a systematic investigation of the physical cell arrangements employed in several currently available SRAM device types, and discuss implications for the occurrence and mitigation of SMU. 
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References

Publications referenced by this paper.
Showing 1-6 of 6 references

Shoga , " Double Upsets from Glancing Collisions : A Simple Model Verified with Flight Data

E. C. Smith
IEEE Transactions on Nuclear Science • 1992

On the Suitability of Non - hardened High Density SRAM ' s for Space Applications

R. Koga, W. R. Crain, K. B. Crawford, D. D. Lau, S. D. Pinkerton
1991

Heavy Ion Induced Single Hard Errors on Submicronic Memories

C Dufour, P. Gamier, +3 authors M. Labrunee
IEEE Transactions on Nuclear Science

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