Single-Event Transient Pulse Quenching in Advanced CMOS Logic Circuits

  title={Single-Event Transient Pulse Quenching in Advanced CMOS Logic Circuits},
  author={J. R. Ahlbin and L. W. Massengill and B. L. Bhuva and Balaji Narasimham and M. J. Gadlage and P. H. Eaton},
  journal={IEEE Transactions on Nuclear Science},
Heavy-ion broad-beam experiments on a 130 nm CMOS technology have shown anomalously-short single-event transient pulse widths. 3-D TCAD mixed-mode modeling in 90 nm and 130 nm bulk CMOS has identified a mechanism for simultaneous charge collection on proximal circuit nodes interacting in a way as to truncate, or ¿quench,¿ a propagated voltage transient, effectively limiting the observed SET pulse widths at high LET. This quenching mechanism is described and analyzed. 
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