Simultaneous logic decomposition with technology mapping in FPGA designs

Abstract

Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact of logic decomposition on delay and area of the technology mapping solutions is not well understood. In this paper, we present an algorithm named SLDMap that performs delay… (More)
DOI: 10.1145/360276.360298

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Cite this paper

@inproceedings{Chen2001SimultaneousLD, title={Simultaneous logic decomposition with technology mapping in FPGA designs}, author={Gang Chen and Jason Cong}, booktitle={FPGA}, year={2001} }