Simulation based Performance Study of Cache Coherence Protocols

  title={Simulation based Performance Study of Cache Coherence Protocols},
  author={Neethu Bal Mallya and Geeta Patil and Biju K. Raveendran},
  journal={2015 IEEE International Symposium on Nanoelectronic and Information Systems},
Cache coherence protocol maintains data consistency between different cores / processors in a shared memory multi-core (MC) / multi-processor (MP) system. Coherency can be achieved at the cost of increased miss rate because of invalidations. Coherency misses and the number of signals for maintaining data in consistent state consumes additional time and energy. This paper studies the impact of cache coherence misses, invalidations and additional signals due to MI, MESI and MOESI cache coherence… CONTINUE READING


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