Corpus ID: 1911635

Simulation and Analysis of 2:1 Multiplexer Circuits at

  title={Simulation and Analysis of 2:1 Multiplexer Circuits at},
  author={I. Gupta and N. Arora and B. P. Singh},
  • I. Gupta, N. Arora, B. P. Singh
  • Published 2011
  • Computer Science
  • A multiplexer, sometimes referred to as a "MUX", is a device that selects between a numbers of input signals. It is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. This paper represents the simulation of different 2:1 MUX configurations and their comparative analysis on different parameters such as Power Supply Voltage, Operating Frequency, Temperature, Load Capacitance and Area Efficiency etc. All the simulations have… CONTINUE READING
    3 Citations
    Analysis of Various DCVSL Structures and Implementation of Full Adder with Them
    • PDF
    Design of area and power aware reduced Complexity Wallace Tree multiplier
    • 8
    Performance analysis of reduced complexity Wallace multiplier using energy efficient CMOS full adder
    • 9


    Top-down pass-transistor logic design
    • 277
    Cascode voltage switch logic: A differential CMOS logic family
    • 524
    • PDF
    A Fine Grain Configurable Logic Block for Self-checking FPGAs
    • 12
    • PDF
    Design Methodology of a 32-bit Arithmetic Logic Unit with an Adaptive Leaf-cell Based Layout Technique
    • 9
    • Highly Influential
    • PDF
    Multiplexer-based Logic Synthesis Using Pass-transistor Logic
    • VLSI Design,
    • 2002
    High - performance Multiplexerbased Logic Synthesis Using Passtransistor Logic ”
    • VLSI Design
    • 2002