Simplification of C-RTL equivalent checking for fused multiply add unit using intermediate models

@article{Xue2013SimplificationOC,
  title={Simplification of C-RTL equivalent checking for fused multiply add unit using intermediate models},
  author={Bin Xue and Prosenjit Chatterjee and Sandeep K. Shukla},
  journal={2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)},
  year={2013},
  pages={723-728}
}
The functionality of Fused multiply add (FMA) design can be formally verified by comparing its register transition level (RTL) implementation against its system level specification often modeled by C/C++ language using sequential equivalent checking (SEC). However, C-RTL SEC does not scale for FMA because of the huge discrepancy existed between the two models. This paper analyzes the dissimilarities and proposes two intermediate models, one abstract RTL and one rewritten C model to bridge the… CONTINUE READING

Citations

Publications citing this paper.

References

Publications referenced by this paper.
SHOWING 1-9 OF 9 REFERENCES

Solver technology for system-level to RTL equivalence checking

  • 2009 Design, Automation & Test in Europe Conference & Exhibition
  • 2009
VIEW 2 EXCERPTS

Bridge Floating-Point Fused Multiply-Add Design

  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • 2008
VIEW 1 EXCERPT

P754, IEEE 754-2008 Standard for Floating

I T.
  • Point Arithmetic,
  • 2008
VIEW 2 EXCERPTS

Floating-Point Fused Multiply-Add Architectures

  • 2007 Conference Record of the Forty-First Asilomar Conference on Signals, Systems and Computers
  • 2007
VIEW 2 EXCERPTS

Similar Papers

Loading similar papers…