Silicon nano-transistors and breaking the 10 nm physical gate length barrier

  title={Silicon nano-transistors and breaking the 10 nm physical gate length barrier},
  author={R. S. Chau and B. S. Doyle and Mark Doczy and Shammanna M. Datta and Scott Hareland and Ben Jin and Jack Kavalieros and Matthew J Metz},
  journal={61st Device Research Conference. Conference Digest (Cat. No.03TH8663)},
In this paper, the performance and energy delay trends for research devices down to 10 nm and also discusses the 10 nm barrier and potential ways to break it were explored. 
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