Corpus ID: 14540454

Silicon Implementation of SHA-3 Finalists : BLAKE , Grøstl , JH , Keccak and Skein

@inproceedings{Guo2011SiliconIO,
  title={Silicon Implementation of SHA-3 Finalists : BLAKE , Gr{\o}stl , JH , Keccak and Skein},
  author={X. Guo and Meeta Srivastav and Sinan Huang and D. Ganta and Michael B. Henry and L. Nazhandali and P. Schaumont},
  year={2011}
}
Hardware implementation quality is an important factor in selecting the NIST SHA-3 competition finalists. However, a comprehensive methodology to benchmark five final round SHA-3 candidates in ASIC is challenging. Many factors need to be considered, including application scenarios, target technologies and optimization goals. This work describes detailed steps in the silicon implementation of a SHA-3 ASIC. The plan of ASIC prototyping with all the SHA-3 finalists, as an integral part of our SHA… Expand
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