Shrubbery: a new algorithm for quickly growing high-quality Steiner trees


As we move to deep sub-micron designs below 0.18 microns, the delay, area, and power dissipation of a circuit is dominated by the interconnections (routes) between the transistors. The interconnection pattern for each set of pins that must be connected (net) is a Steiner tree, and the primary sub-problem in (global) routing is to find a minimal Steiner tree… (More)
DOI: 10.1109/ICVD.2004.1261038


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