Should Yield be a Design Objective?

  title={Should Yield be a Design Objective?},
  author={Israel Koren},
The obje tives of good hip design have traditionally in luded issues like performan e, power and reliability. Yield is rarely onsidered during the design pro ess, ex ept in the design of memory ICs, where spe i defe t-toleran e te hniques are in orporated into the ar hite ture for yield enhan ement. In order to make the ase for establishing yield as another design obje tive we must rst prove that a hip's yield an not only be a e ted, but onsistently improved, by de isions made during the design… CONTINUE READING


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Publications referenced by this paper.
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Floorplanning of Memory ICs: Routing Complexity vs. Yield,"Pro . of the Interna- tional Symposium on Mi roele troni Manufa tur- ing Te hnologies - Yield, Reliability and Failure Analysis (MMT04)

  • I. Koren, Z. Koren
  • 1999

Defect Tolerant VLSI Circuits: Techniques and Yield Analysis,"Pro

  • I. Koren, Z. Koren
  • eedings of the IEEE,
  • 1998

Gyvez (editor), IC Manufa turability: The Art of Pro ess and Design Integration, IEEE Computer Society Press

  • J P.
  • Los Alamitos,
  • 1998

editor),Manufa turing Yield Evaluation of VLSI/WSI Systems, IEEE Computer

  • B. Ciciani
  • 1998

A Post - Processing Algorithm for Short - Circuit Defect Sensitivity reduction in VLSI Layouts

  • G. Andrus N. Maldonado, A. Tyagi, M. Madani
  • IEEE Int . Conferen e on Wafer S ale Integration
  • 1995