Serial and parallel interleaved modular multipliers on FPGA platform

  title={Serial and parallel interleaved modular multipliers on FPGA platform},
  author={Khalid Javeed and Xiaojun Wang and Mike Scott},
  journal={2015 25th International Conference on Field Programmable Logic and Applications (FPL)},
Modular multiplication is a core operation in all public key based cryptosystems. The performance of these cryptosystems can be enhanced substantially by incorporating an optimized modular multiplier. This paper presents serial and parallel radix-4 modular multipliers based on interleaved multiplication algorithm and Montgomery power laddering technique. A serial radix-4 interleaved modular multiplier provides 50% reduction in the required clock cycles. In addition to the reduction in clock… CONTINUE READING


Publications referenced by this paper.
Showing 1-10 of 17 references

Similar Papers

Loading similar papers…