Sense amplifier with offset mismatch calibration for sub 1-V DRAM core operation

Abstract

In this paper, a sense amplifier circuit, which aims to operate with 1V or less supply voltage, is presented. While a conventional sense amplifier uses inverters connected in a cross-coupled manner without any special timing phase, the proposed sense amplifier circuit employs a calibration phase to provide offset voltage margin relaxation. The relaxed… (More)
DOI: 10.1109/ISCAS.2010.5537834

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